RISC-V Virtual Prototype

A brand new technical paper titled “Advanced Embedded System Modeling and Simulation in an Open Source RISC-V Virtual Prototype” was printed by researchers at DFKI GmbH and University of Bremen.

Abstract
“RISC-V is a contemporary Instruction Set Architecture (ISA) that, by its open nature together with a clear and modular design, has monumental potential to grow to be a sport changer within the Internet of Things (IoT) period. Recently, SystemC-based Virtual Prototypes (VPs) have been launched into the RISC-V ecosystem to put the muse for superior industry-proven system-level use-cases. However, VP-driven setting modeling and interplay have largely been uncared for within the RISC-V context. In this paper, we suggest such an extension to broaden the appliance area for digital prototyping within the RISC-V context. As a basis, we constructed upon the open supply RISC-V VP obtainable at GitHub. For a visualization of the setting functions, we designed a Graphical User Interface (GUI) and designed applicable libraries to supply {hardware} communication interfaces comparable to GPIO and SPI from the VP to an interactive setting mannequin. Our strategy is designed to be built-in with SystemC-based VPs that leverage a Transaction-Level Modeling (TLM) communication system to want a speed-optimized simulation. To present the practicability of an setting mannequin, we offer a set of constructing blocks comparable to buttons, LEDs and an OLED show and configured them in two demonstration environments. Moreover, for speedy prototyping functions, we offer a modeling layer that leverages the dynamic Lua scripting language to design elements and combine them with the VP-based simulation. Our analysis with two totally different case-studies demonstrates the applicability of our strategy in constructing digital environments successfully and appropriately when matching the actual bodily programs. To advance the RISC-V group and stimulate additional analysis, we offer our prolonged VP platform with the setting configuration and visualization toolbox, in addition to each case-studies as open supply on GitHub.”

Find the technical paper here and associated case research as open supply on GitHub here.

Pieper, P.; Herdt, V.; Drechsler, R. Advanced Embedded System Modeling and Simulation in an Open Source RISC-V Virtual Prototype. J. Low Power Electron. Appl. 2022, 12, 52. https://doi.org/10.3390/jlpea12040052.

https://semiengineering.com/risc-v-virtual-prototype/

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